The present invention relates to interconnected systems. In particular, the present invention relates to audio, video, and audio/video interconnected systems for home and office use. More particularly, the present invention relates to a method and system for using a new bus identifier resulting from a bus topology change.
With the development of consumer electronic audio/video (A/V) equipment, and the advance of digital A/V applications, such as consumer A/V device control and signal routing and home networking, various types of data in various formats can now be transferred among several audio/video control (AV/C) devices via one digital bus system. However, many current systems do not have sufficient bandwidth resources to transfer and display all the different types of data at the same time.
Typical computer systems solve the bandwidth problem by increasing the bandwidth of the system bus to handle all of these forms, types and amount of data. As a result, as users request more types of information such as in multimedia applications, the system bus has become more clogged with information other than information directly utilized and needed by the main processor.
Many computer systems incorporate at least two buses. A first bus, commonly referred to as a memory bus, is typically used for communications between a central processor and a main memory. A second bus, known as a peripheral bus, is used for communications between peripheral devices such as graphics systems, disk drives, or local area networks. To allow data transfers between these two buses, a bus bridge is utilized to xe2x80x9cbridgexe2x80x9d and thereby couple, the two buses together.
One example of a high-speed bus system for interconnecting A/V nodes, configured as a digital interface used to transport commands and data among interconnecting audio/video control (AV/C) devices, is the IEEE 1394 standard serial bus implemented by IEEE Std 1394-1995, Standard For A High Performance Serial Bus, Aug. 30, 1996 (hereinafter xe2x80x9cIEEE 1394 standardxe2x80x9d) and other related 1394 standards.
The IEEE 1394 standard is an international standard for implementing a high-speed serial bus architecture, which supports both asynchronous and isochronous format data transfers. The IEEE 1394 standard defines a bus as a non-cyclic interconnect, consisting of bus bridges and nodes. Within a non-cyclic interconnect, devices may not be connected together so as to create loops. Within the non-cyclic interconnect, each node contains an AV/C device, and bus bridges serve to connect buses of similar or different types.
The primary task of a bridge is to allow data to be transferred on each bus independently without demonstrating performance of the bus, except when traffic crosses the bus bridge to reach the desired destination on the other bus. To perform this function, the bridge is configured to understand and participate in the bus protocol of each of the buses.
Multi-bus systems are known to adequately handle large amounts of information. However, communication between buses and devices on different buses is difficult. Typically, a bus bridge may be used to interface I/O buses to the system""s high-performance processor/memory bus. With such I/O bridges, the CPU may use a 4-byte read and write transaction to initiate DMA transfers. When activated, the DMA of a serial bus node generates split-response read and write transactions which are forwarded to an intermediate system backbone bus that also implements serial bus services.
Depending on the host system design, the host-adapter bridge may have additional features mandated by differences in bus protocols. For example, the host bus may not directly support isochronous data transfers. Also, the host-adapter bridge may enforce security by checking and translating bridge-bound transaction addresses and may often convert uncached I/O transactions into cache-coherent host-bus transaction sequences.
A common occurrence in multi-bus systems is a bus topology change. For example, a bus topology change may occur if a device is added or removed on a bus. Such a bus topology change causes a bus reset in which the bus topology is reconfigured. In the bus reset process, three procedures are typically performed, which are bus initialization, tree identification, and self-identification. Consequently, the bus reset process may affect local or physical address (xe2x80x9cphyIDxe2x80x9d) of devices on the bus.
Typically, an address for a device on the bus includes a bus identifier (xe2x80x9cbusIDxe2x80x9d) and a local identifier (xe2x80x9cphyIDxe2x80x9d). The busID identifies a particular bus in the multi-bus system, and the phyID identifies where the device is located on the particular bus. For example, a device may have a busID and a phyID of xe2x80x9cx.0xe2x80x9d in which xe2x80x9cxxe2x80x9d indicates the busID and xe2x80x9c0xe2x80x9d indicates the phyID.
In prior multi-bus systems, the self-identification procedure of the bus reset provides the phyID for devices on the affected bus, and the busIDs are maintained. The busIDs are maintained to provide busID stability. For example, before a bus reset, a device may have a busID and a phyID of xe2x80x9cx.0,xe2x80x9d and after the bus reset the busID and phyID may change to xe2x80x9cx.3.xe2x80x9d Hence, in prior multi-bus systems, a conversion table is required to convert the address xe2x80x9cx.0xe2x80x9d to xe2x80x9cx.3xe2x80x9d so that the proper device is addressed.
A disadvantage of using conversion tables is that it requires additional hardware and time to perform the conversion process. Another disadvantage of prior multi-bus systems is that the bus reset is contained locally, and devices on other buses cannot be easily and reliably informed of bus reset changes. As such, a device on one bus may incorrectly address a device on another bus that has performed a bus reset. Furthermore, in prior multi-bus systems, a device may have accessed another device in one state before a bus reset, and may try to access the same device after a bus reset in which its state may have changed. Thus, a device may access a device without knowing its change of state.
A method and system for using a new bus identifier in an interconnect are disclosed. For one embodiment, the interconnect includes a plurality of nodes and at least one bus bridge. A configuration change is determined on the first bus connected to the plurality of nodes. Each node has a corresponding bus identifier. A new bus identifier is assigned for each node having a changed state if a configuration change is determined on the first bus.
The method and system using a new bus identifier allows a node to become aware that another node has a change of state as a result of a configuration change on a bus. Thus, nodes are prevented from unintentionally accessing a node without knowledge of a change of state.